Author Details

Amano, Hideharu, Keio University

  • Vol 3, No 2 (2013) - Regular Paper(s)
    Adaptive Flux Calculation Scheme in Advection Term Computation Using Partial Reconfiguration
    Abstract  PDF
  • Vol 5, No 1 (2015) - Regular Paper(s)
    A Co-Processor Design for an Energy Efficient Reconfigurable Accelerator CMA
    Abstract  PDF
  • Vol 8, No 1 (2018) - Regular Paper(s)
    Escalator Network for a 3D Chip Stack with Inductive Coupling ThruChip Interface
    Abstract  PDF
  • Vol 11, No 2 (2021) - Special Issue on the Eighth International Symposium on Computing and Networking
    An implementation methodology for Neural Network on a Low-end FPGA Board
    Abstract  PDF
  • Vol 12, No 2 (2022) - Special Issue on the Ninth International Symposium on Computing and Networking
    Weighted Least Square Filter for Improving the Quality of Depth Map on FPGA
    Abstract  PDF